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ASIC Physical Design Engr, Sr II

Company: Synopsys
Location: Mountain View
Posted on: January 16, 2022

Job Description:

ASIC Physical Design Engr, Sr II 30860BR USA - California - Mountain View/Sunnyvale Job Description and Requirements The Synopsys Mixed-Signal IP organization seeking a highly motivated individual responsible for the physical implementation of complex Mixed signal IPs and test chips across multiple process technologies.


We're looking for a Physical Design Implementation Engineer to join the team.

Does this sound like a good role for you?

In this role, you will be responsible for the Physical implementation of high speed interface IPs and test-chips, driving all aspects from RTL to GDS including timing and physical sign-off, in close interaction and collaborative team work with multiple functional groups (front end, analog, CAD) and the product team.


Key Qualifications:

  • MSEE, w/ 8 + years of physical design experience with recent contribution to project tape-outs.

  • Has intimate knowledge of the full design cycle from RTL to GDSII, including chip level.

  • Has solid engineering understanding of the underlying concepts of IC design, implementation flows and methodologies for deep submicron design.

  • Has good communication skills, ability to think and communicate at different levels of abstraction with peer groups.

  • Must demonstrate knowledge of the Synopsys tools, flows and methodologies required to execute physical design projects. These tools may include: Design Compiler, Physical Compiler, Primetime SI, ICC, Star-RCXT, Hercules, HSPICE and other tools.

  • Has good software and scripting skills (Perl, Tcl, Python); knowledge of CAD automation methods.
  • Autonomous, timely decision maker and able to cope with interrupts.
    At Synopsys, we're at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we're powering it all with the world's most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.

    Our Silicon IP business is all about integrating more capabilities into an SoC-faster. We offer the world's broadest portfolio of silicon IP-predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.

    Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.

    Job Category Engineering Country United States Job Subcategory ASIC Physical Design Hire Type Employee CategoryElectrical EngineersExperience8 to 20+ yearsJob typeFull time

Keywords: Synopsys, Mountain View , ASIC Physical Design Engr, Sr II, Other , Mountain View, California

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