Senior Signal and Power Integrity Engineer
Company: Microsoft
Location: Mountain View
Posted on: October 31, 2025
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Job Description:
Microsoft Silicon, Cloud Hardware, and Infrastructure
Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud
Infrastructure and responsible for powering Microsoft’s
“Intelligent Cloud” mission. SCHIE delivers the core infrastructure
and foundational technologies for Microsofts over 200 online
businesses including Bing, MSN, Office 365, Xbox Live, Teams,
OneDrive, and the Microsoft Azure platform globally with our server
and data center infrastructure, security and compliance,
operations, globalization, and manageability solutions. Our focus
is on smart growth, high efficiency, and delivering a trusted
experience to customers and partners worldwide and we are looking
for passionate, high-energy engineers to help achieve that mission.
The Compute Silicon & Manufacturing Engineering (CSME) organization
within SCHIE is responsible for design, development, manufacturing
and packaging of Microsofts state of the art custom computer chips,
notably the Azure Cobalt. Our solutions provide sustainable
strategic advantage to Microsoft and enable our customers to
achieve more. We are seeking a Senior Signal Integrity and Power
Integrity (SIPI) Engineer to join the engineering team responsible
for developing advanced power delivery and signaling solutions for
High Performance Computing (HPC) silicon designs. In this role, you
will be responsible for driving the completion of SIPI design
solutions supporting overall SOC performance interfacing with
silicon, packaging, and system design teams. Qualifications
Required Qualifications: Doctorate in Electrical Engineering,
Computer Engineering, Computer Science, or related field AND 1
year(s) technical engineering experience OR Masters Degree in
Electrical Engineering, Computer Engineering, Computer Science, or
related field AND 4 years technical engineering experience OR
Bachelors Degree in Electrical Engineering, Computer Engineering,
Computer Science, or related field AND 5 years technical
engineering experience OR equivalent experience. 1 year of
experience in design and electrical modelling of Signal and Power
Integrity, System design, IP design with knowledge on product
development Other Requirements: Ability to meet Microsoft, customer
and/or government security screening requirements are required for
this role. These requirements include, but are not limited to, the
following specialized security screenings: Microsoft Cloud
Background Check: This position will be required to pass the
Microsoft Cloud background check upon hire/transfer and every two
years thereafter Preferred Qualifications: MSEE degree with 10
years’ experience in silicon packaging products development
Experience with high-speed signal design and/or power integrity
modelling for HPC products Strong foundation in advanced packaging
technologies as it relates to Signal and Power integrity Experience
with Foundry Silicon technologies, OSAT technologies and Substrate
technologies Good working knowledge in the field of end to end
system SIPI Design and Architecture Industry knowledge, trends and
landscape of technologies to drive development across Silicon-IP,
Advanced packaging, Substrate technology, Board technology and
Platform design Excellent interpersonal skills including written
and verbal communication, teamwork, negotiation, and presentation
Silicon Engineering IC4 - The typical base pay range for this role
across the U.S. is USD $119,800 - $234,700 per year. There is a
different range applicable to specific work locations, within the
San Francisco Bay area and New York City metropolitan area, and the
base pay range for this role in those locations is USD $158,400 -
$258,000 per year. Microsoft will accept applications for the role
until October 6, 2025. Responsibilities The SMPE silicon team is
seeking a passionate, driven, and intellectually curious
computer/electrical engineer to deliver premium-quality designs
once considered impossible. We are responsible for delivering
cutting-edge, custom IP and SoC designs that can perform complex
and high-performance functions in an extremely efficient manner.
SIPI engineer for compute and AI SoCs and platforms – Implement
strategies for end-to-end power delivery design and signal
integrity design from Silicon to Package, and linking to Platform
to System and Cloud Deliver SIPI solutions that meet the HPC
demands across the entire system. Drive future power and signal
integrity solutions for chiplet architecture with advanced
packaging and advanced silicon nodes Design, model, and simulate SI
and PI (i.e., incl. IP design, voltage regulator, motherboard, CPU
package, silicon, and decoupling capacitor solution) for data
center processors and corresponding platforms to ensure optimized
performance. Performs DC, AC and transient simulation to provide
noise, impedance profile of the whole power delivery path and
link/electrical simulations to validate I/O performance from
platform to silicon. Work closely with silicon and platform
architects, motherboard and package designers, thermal architects
and engineers, and power and performance engineers. Drives the
execution of architecture solutions across product lines or
multiple product groups across teams that account for design trends
and future concepts by leveraging cross- functional expertise,
industry best practices, and lessons learned from teams working
across multiple product lines Drives engineering system design
decisions that require collaboration between internal and external
stakeholders to account for platform-specific technology decisions
and develop system models based on current and anticipated
feature/design needs and trade-offs.
Keywords: Microsoft, Mountain View , Senior Signal and Power Integrity Engineer, IT / Software / Systems , Mountain View, California
