ATE Test Engineer, Silicon

Company: Google
Location: Mountain View
Posted on: July 1, 2025

Job Description:

Minimum qualifications: Bachelors degree in Electrical Engineering, Mechanical Engineering, Materials Science, Chemical Engineering, related degree or equivalent practical experience. 3 years of experience in Security implementation across System Level Test (SLT), Bench and Automatic Test Equipment (ATE) platforms. Experience with object oriented programming languages (Java/C++) in environments like GIT, SVN, JIRA, Agile. Experience with Linux, gSuites, Android systems. Experience One-time Password (OTP) fusing for identification, security, calibration, yield, and feature configuration. Preferred qualifications: Experience implementing secure end to end manufacturing solutions including key provisioning, life-cycle management and SOC security. Experience of secure infrastructure deployment for secure manufacturing touch points. Experience with development of secure digital and mixed signal test and automation methodologies and support internal tools for ATE test program generation, test vector tracking, test program release. Experience development of multi site libraries to implement ATE OTP programming, memory repair and validation methodologies and processes. Experience with ATE test platforms and measurement equipment, with a preference for the Advantest 93k. About the job Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Googles direct-to-consumer products. Youll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. As a Test Security Engineer, you will help integrate SOC technologies into mobile phones, tablets and laptops. You will facilitate secured ATE and system level manufacturing testing of SOC to validate its performance, screen out bad devices. You will be responsible for all aspects of security with respect to Test and Product Engineering activities. you will work with ASIC Architecture, Design, Pre-silicon SOC Verification to implement secure end to end manufacturing solutions including key provisioning, life-cycle management and SOC security. You will partner with IT to provide specifications and deploy secure infrastructure for secure manufacturing touch points. In this role, you will work with various groups to develop digital and mixed signal test and automation methodologies and develop and support internal tools for test program generation, vector tracking, test program release, etc. Initially, the focus will be on improvement of efuse and OTP programming, memory repair and validation methodologies and processes. In addition, you will also work on releasing cost effective production test solutions into mass production. You will also be responsible for working with IT to develop secure bidirectional manufacturing yield data flow. Googles mission is to organize the worlds information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make peoples lives better through technology. The US base salary range for this full-time position is $132,000-$189,000 bonus equity benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process. Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google . Responsibilities Test ATE program development on UFLEX, 93K, or other ATE platforms. Load board or Probe card design for NPI on UFLEX, 93K, or other ATE platforms. Develop a BenchTop and High Volume manufacturing SLT solution working with SLT Vendor and internal cross-functional teams. Bring-up IC Product verification and characterization on ATE NPI production program release. Troubleshoot new products defective parts per million (DPPM) correlation, and product correlation between system and ATE. Troubleshoot on different failure modes and test coverage improvement on ATE and SLT.

Keywords: Google, Mountain View , ATE Test Engineer, Silicon, Engineering , Mountain View, California