Post Silicon Validation Engineer

Company: Wipro
Location: Mountain View
Posted on: August 1, 2022

Job Description:

Ensure robust operation and successful integration of DRAM memories and SOC devices for products developed by Google
Ensure Memory Controller, DRAM silicon, and board level testing meets JEDEC electrical and functional specifications
Execute validation test plans for functional, characterization and qualification
Experience with High Bandwidth Scope, Logic/Protocol Analyzer and Temperature Chambers
Experience in LPDDR/DDR IO characterization, qualification and reviewing, tuning memory calibration code/algorithms
Expertise in bootloader/firmware development in C/C++ and assembly
Previous experience in Failure Analysis of DRAM devices
Skills with innovative packaging technology (POP, TSV, etc.) and their relationship to DRAM signal/power integrity
5+ years in Memory Controller validation and DRAM validation

Keywords: Wipro, Mountain View , Post Silicon Validation Engineer, Engineering , Mountain View, California

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